SONY has released their new image sensors within its cutting-edge third generation Pregius line, featuring the SLVS-EC high-speed interface. Both the CMOS Global Shutter IMX425 and the IMX432, with a 1.1” optical format, provide 1,78 Megapixel resolution, and a pixel pitch of 9µm for excellent image quality. These next generation sensors are available at FRAMOS®. The IMX425 is a perfect fit for high-speed factory automation with an 8 / 10 / 12-bit A/D converter and a throughput of up to 565 frames per second (fps) at a 10-bit pixel depth. The IMX432 is a reduced-lanes version providing up to 98fps with a pixel depth of 12-bits, and covers ITS and traffic solutions, in addition to life sciences applications, including microscopy.
Sibel Yorulmaz-Cokugur, Sensor expert at FRAMOS, says: “The excellent speed and image quality is one of the biggest advantages of SONY’s 3rd Gen Pregius devices. Maximizing the throughput of production lines with high frame rates, objects can be inspected with precise detection, and increased accuracy from short working distances. A capacity of up to eight Regions of Interest (ROI) make even higher frame rates possible. The SLVS-EC standard ensures fast transmission for real-time processing.”
The IMX425 imager, like all third generation Pregius devices with the 8-lanes high-speed SLVS-EC interface standard, provides a maximum output of 18.4Gbps. It produces excellent image quality by featuring high/low conversation gain modes, dual triggering, dual ADC, and self-triggering. These features achieve high sensitivity, low dark current, and, low PLS characteristics.
The industry and product experts at FRAMOS are available to support customers with the integration of these new sensors into their applications and projects. In addition, FRAMOS provides support services for development, customization, and logistics. Additionally, FRAMOS has developed an SLVS-EC Rx IP Core and Evaluation board for easy sensor interfacing with FPGAs from Xilinx that reduces development times.
Framos has also launched the first SLVS-EC RX IP Core for easy sensor interfacing with FPGAs from Xilinx. The proprietary FRAMOS FPGA module available with an Evaluation Kit, connects SONY’s latest high-speed SLVS-EC interface with Xilinx FPGAs and enables vision engineers to seamlessly upgrade to Sony’s interface technology of the future and to create high-performance vision solutions. Based on the long-term partnership with Sony and as official Xilinx partner, the FRAMOS IP product provides the technological basis for future camera developments and Embedded Vision devices.
The FRAMOS developed RX IP Core reduces overhead and complexity implementing a SONY imager with SLVS-EC. As on-chip function block connecting the customer’s FPGA logic with the image sensor’s data stream, the IP Core receives the interface data, manages the byte-to-pixel conversion for various lane configurations and thus prepares a highly-efficient processing workflow run on the FPGA. The FRAMOS software supports SLVS-EC v1.2 with 1, 2, 4, 8 lanes configurable by the user and delivers pixels formats from 8 to 14-bit of raw data. By de-risking the sensor implementation it significantly reduces the development efforts and accelerates the time to market.
Simon Che’Rose, Head of Development at FRAMOS explains the advantages for system designers: “SLVS-EC is the benchmark interface standard of the future for high-speed data transfer from SONY imagers. It uplifts existing and upcoming CMOS designs to the next speed and performance level and supports miniaturization. Each customer using SONY image sensors either working with high-speed or embedded solutions will benefit from the SLVS-EC interface and its unique features. Our RX IP Core Block for Xilinx FPGAs in combination with the full documented evaluation kit makes integration and system development easy, resulting in a faster time to market for customer applications working with SLVS-EC. Partnering with FRAMOS, customers can maximize their strength in innovation by focusing on application specific competencies.”
As an official Xilinx partner, FRAMOS is working in close cooperation with Xilinx. The SLVS-EC RX IP Core works with the main existing and upcoming FPGA families. The package includes the encrypted RTL IP Core with a simulation environment (ModelSim) and dedicated reference design examples and supports customers to get up to speed based on FRAMOS’ 37 years imaging experience. The available Evaluation Kit provides designs to guide and test the implementation of a SLVS-EC based sensor, including the HW/SW environment and documented implementation examples with source codes.
The industry and product experts at FRAMOS have applied their profound knowledge of sensor technology to support customers integrating the new sensors with the SLVS-EC interface standard into their applications and projects, together with additional services like development support, customizations, and logistics.
